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DS1677
17 of 18
POWER-FAIL WARNING Figure 14
NOTES:
1. All voltages are referenced to ground.
2. ICCA is specified with outputs open, CS set to a logic 1, SCLK = 500kHz, oscillator enabled, and ADC
enabled.
3. IADC is specified with CS, VCCO open and I/O, SCLK at logic 0. ADC is enabled.
4. ICCS is specified with CS, VCCO open and I/O, SCLK at logic 0. ADC is disabled.
5. CS has a 40k
pulldown resistor to ground.
6. Measured at VIH = 2.0V or VIL = 0.8V and 10ns maximum rise and fall time.
7. Measured at VOH = 2.4V or VOL = 0.4V.
8. Load capacitance = 25pF.
9. ICCO = 100mA, VCC > VCCTP.
10. VCCO switchover from VCC to VBAT occurs when VCC drops below the lower of VCCSW and VBAT.
11. Current from VCC input pin to VCCO output pin.
12. Current from VBAT input pin to VCCO output pin.
13. Time base is generated by very accurate crystal oscillator. Accuracy of this time period is based on
the crystal that is used. A typical crystal with a specified load capacitance of 6pF will provide an
accuracy within
100ppm over the 0C to +70C temperature range. For greater accuracy, refer to the
DS32kHz data sheet.
14. If the EOSC bit in the Control Register is set to a logic 1, tRPU is equal to 250ms plus the startup time
of the crystal oscillator.
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